COdesign and power Management in PLatform-based design
The aim of the COMPLEX project is to increase the competitiveness of the European semiconductor, system integrator and EDA industry by addressing the problem of platform-based design space exploration (DSE) under consideration of power and performance constraints early in the design process.
Rising heterogeneity and complexity of embedded systems results into gaps and defines challenges that a leading industry has to face, such as handling complexity of execution platforms and applications, uncertainty of platform selection and application to platform mapping, balancing between increasing power consumption, performance, and explicit application needs and meeting memory demands both in size and access times.
As a consequence, the primary objective of COMPLEX is to develop an innovative, highly efficient and productive design methodology and a holistic framework for iteratively exploring the design space of embedded hardware/software (HW/SW) systems.
R & D innovation
The R&D activities to be performed in COMPLEX will target new modeling and specification methodologies by using software like MDA design entry for system design as well as the integration of HW and SW timing and power estimation in efficient virtual system simulation, and also multi-objective design-space exploration under consideration of run-time management for power and performance optimizations.
Distinguishing feature of the R&D approach of COMPLEX is that it unifies the development and integration of next-generation MDA design-entry with platform-based design, existing EDA techniques and tools for estimation and model generation for virtual system prototypes, and a multi-objective design-space exploration technique and tool. This enables a synergic approach to a holistic embedded HW/SW virtual system prototyping approach regardless of the target platform and application domain.
Industrial relevance / Potential applications and future issues
The COMPLEX design framework will be developed by research (OFFIS, Politecnico di Milano, Politecnico di Torino, University of Cantabria, IMEC), industry (STMicroelectronics, GMV and Thales) and EDA partners (ChipVision, Synopsys-Coware, Magilem, EDALab), ensuring its usability in realistic, industry-strength design flows and environments, thus allowing the industrial partners to take advantage of the new solutions during the course of the project and to apply the new tools for production purposes shortly after project end.
The COMPLEX technical objectives constitute a prerequisite for the commercial targets of the industrial partners, which are geared towards an improvement of their (and their customers) competitiveness in the world-wide market of electronic products and applications.
Type:EU FP7 IP
Duration:December 2009 – November 2012