Category Archives: Publications

Paper: “A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip”

Authors: Giovanni Mariani† Gianluca Palermo‡ Vittorio Zaccaria‡ Aleksandar Brankovic† Jovana Jovic† Cristina Silvano‡ (†ALaRI – University of Lugano, ‡Politecnico di Milano) Abstract: Given the increasing complexity of multi-processor systems-onchip, a wide range of parameters must be tuned to find the … Continue reading

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A dual-priority real-time multiprocessor system on FPGA for automotive applications

The paper A dual-priority real-time multiprocessor system on FPGA for automotive applications, authored by Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi and Donatella Sciuto will be presented at DATE 2008. This paper presents … Continue reading

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Journal Paper:”Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors”

authored by Matteo Monchiero, Gianluca Palermo, Cristina Silvano and Oreste Villa will be published on Journal of System Architecture. Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric interconnect fabrics, such … Continue reading

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Paper: “The Shining embedded system design methodology based on self dynamic reconfigurable architectures”

The short paper titled “The Shining embedded system design methodology based on self dynamic reconfigurable architectures”, authored by Marco D. Santambrogio, Carlo A. Curino, Vincenzo Rana, Francesco Redaelli and Donatella Sciuto will be presented at ASP-DAC 2008. Complex design, targeting … Continue reading

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Paper: “A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip”

The paper “A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip”, authored by Giovanni Beltrame, Cristiana Bolchini, Luca Fossati, Antonio Miele e Donatella Sciuto has been presented at DFT 2007. Reliability issues play a relevant role in the design … Continue reading

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Paper: “TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs”

The paper “TMR and Partial Dynamic Reconfiguration to mitigate SEU faults in FPGAs” authored by Cristiana Bolchini, Antonio Miele, Marco D. Santambrogio has been presented at DFT 2007. This paper presents the adoption of the Triple Modular Redundancy coupled with … Continue reading

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Poster presentation: “Evolvable Hardware: a functional level evolution framework based on ImpulseC”

The short paper titled “Evolvable Hardware: a functional level evolution framework based on ImpulseC”, authored by Anna Antola, Marco Castagna, Pamela Gotti, David Pellerin, Marco D. Santambrogio has been presented at ERSA 2007.

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Poster presentation: “Exploring Partial Reconfiguration for Mitigating SEU faults in SRAM-Based FPGAs”

The short paper titled “Exploring Partial Reconfiguration for Mitigating SEU faults in SRAM-Based FPGAs”, authored by Cristiana Bolchini, Fabio Salice and Marco D. Santambrogio has been presented at ERSA 2007. This paper discusses innovative approaches to design digital systems on … Continue reading

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Paper: “Task Partitioning for the Scheduling on Reconfigurable Systems driven by Specification Self-Similarity”

The paper titled “Task Partitioning for the Scheduling on Reconfigurable Systems driven by Specification Self-Similarity ”, authored by Matteo Giani, Massimo Redaelli, Marco D. Santambrogio, Donatella Sciuto has been be presented at ERSA 2007.

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Paper: “A Unified Approach to Canonical Form-based Boolean Matching”

The paper titled “A Unified Approach to Canonical Form-based Boolean Matching”, authored by Giovanni Agosta, Francesco Bruschi, Gerardo Pelosi and Donatella Sciuto will be presented at DAC 2007. In this paper, we face the problem of P-equivalence Boolean matching. We … Continue reading

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