Category Archives: Multichip Processor Architecture

Paper: “A Correlation-based Design Space Exploration Methodology for Multi-Processor Systems-on-Chip”

Authors: Giovanni Mariani† Gianluca Palermo‡ Vittorio Zaccaria‡ Aleksandar Brankovic† Jovana Jovic† Cristina Silvano‡ (†ALaRI – University of Lugano, ‡Politecnico di Milano) Abstract: Given the increasing complexity of multi-processor systems-onchip, a wide range of parameters must be tuned to find the … Continue reading

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Castness 2008 workshop & school

Fabrizio Ferrandi has been invited to Castness 2008 workshop and school. On Monday 15th he will give a talk titled: “hArtes software partitioning overview” and on Friday 18th he will give a lecture titled: “Zebu: a compiler framework for MPSoCs … Continue reading

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A dual-priority real-time multiprocessor system on FPGA for automotive applications

The paper A dual-priority real-time multiprocessor system on FPGA for automotive applications, authored by Antonino Tumeo, Marco Branca, Lorenzo Camerini, Marco Ceriani, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi and Donatella Sciuto will be presented at DATE 2008. This paper presents … Continue reading

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FP7 Project:”MULTICUBE – MULTI-objective design space exploration of MULTI-processor SoC architecture for embedded MULTI-media applications”

Politecnico di Milano will play the role of project management and coordination Other Partners: STMicroelectronics Italy and China, DS2, IMEC, ESTECO, University of Cantabria, ALaRI – Università della Svizzera Italiana, ICT-Beijing Many point tools exist to optimize particular aspects of … Continue reading

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Journal Paper:”Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors”

authored by Matteo Monchiero, Gianluca Palermo, Cristina Silvano and Oreste Villa will be published on Journal of System Architecture. Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric interconnect fabrics, such … Continue reading

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Paper: “ReSP: A Non-Intrusive Transaction-Level Reflective MPSoC Simulation Platform for Design Space Exploration”

The paper “ReSP: A Non-Intrusive Transaction-Level Reflective MPSoC Simulation Platform for Design Space Exploration” authored by Giovanni Beltrame, Cristiana Bolchini, Luca Fossati, Antonio Miele and Donatella Sciuto will be presented at ASP-DAC 2008 This paper presents ReSP, a multi-processor simulation … Continue reading

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Paper: “A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip”

The paper “A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip”, authored by Giovanni Beltrame, Cristiana Bolchini, Luca Fossati, Antonio Miele e Donatella Sciuto has been presented at DFT 2007. Reliability issues play a relevant role in the design … Continue reading

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